no-license¶
The no-license RST directive can be used to include code without license headers.
.. no-license:: file.v
:language: verilog
:linenos:
:caption: examples/verilog/dff.v
Options¶
This directive merely overrides the lines and lineno-start options of the literalinclude directive. So, refer to literalinclude for the available options.
Example¶
Verilog Code Block (with license header)¶
RST Directive¶
1.. literalinclude:: ../code/verilog/dff.v
2 :language: verilog
3 :linenos:
Result¶
1/*
2 * Copyright (C) 2020-2021 The SymbiFlow Authors.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * https://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *
16 * SPDX-License-Identifier: Apache-2.0
17 */
18
19// Single flip-flip test.
20module top(input clk, input di, output do);
21 always @( posedge clk )
22 do <= di;
23endmodule // top
Verilog Code Block (without license header)¶
RST Directive¶
1.. no-license:: ../code/verilog/dff.v
2 :language: verilog
3 :linenos:
Result¶
19// Single flip-flip test.
20module top(input clk, input di, output do);
21 always @( posedge clk )
22 do <= di;
23endmodule // top