The no-license RST directive can be used to include code without license headers.
.. no-license:: file.v :language: verilog :linenos: :caption: examples/verilog/dff.v
This directive merely overrides the lines and lineno-start options of the literalinclude directive. So, refer to literalinclude for the available options.
Verilog Code Block (with license header)¶
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.. literalinclude:: ../code/verilog/dff.v :language: verilog :linenos:
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/* * Copyright (C) 2020 The SymbiFlow Authors. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ // Single flip-flip test. module top(input clk, input di, output do); always @( posedge clk ) do <= di; endmodule // top